drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
This patch adds an initial DRM driver for the Mediatek MT8173 DISP subsystem. It currently supports two fixed output streams from the OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: YT Shen <yt.shen@mediatek.com> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Mao Huang <littlecvr@chromium.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
CK Hu
Philipp Zabel
@@ -0,0 +1,564 @@
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/*
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* Copyright (c) 2015 MediaTek Inc.
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* Author: YT SHEN <yt.shen@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_gem.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <linux/component.h>
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#include <linux/iommu.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include "mtk_drm_crtc.h"
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#include "mtk_drm_ddp.h"
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#include "mtk_drm_ddp_comp.h"
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#include "mtk_drm_drv.h"
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#include "mtk_drm_fb.h"
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#include "mtk_drm_gem.h"
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#define DRIVER_NAME "mediatek"
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#define DRIVER_DESC "Mediatek SoC DRM"
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#define DRIVER_DATE "20150513"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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static void mtk_atomic_schedule(struct mtk_drm_private *private,
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struct drm_atomic_state *state)
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{
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private->commit.state = state;
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schedule_work(&private->commit.work);
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}
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static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
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{
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struct drm_plane *plane;
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struct drm_plane_state *plane_state;
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int i;
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for_each_plane_in_state(state, plane, plane_state, i)
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mtk_fb_wait(plane->state->fb);
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}
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static void mtk_atomic_complete(struct mtk_drm_private *private,
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struct drm_atomic_state *state)
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{
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struct drm_device *drm = private->drm;
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mtk_atomic_wait_for_fences(state);
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drm_atomic_helper_commit_modeset_disables(drm, state);
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drm_atomic_helper_commit_planes(drm, state, false);
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drm_atomic_helper_commit_modeset_enables(drm, state);
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drm_atomic_helper_wait_for_vblanks(drm, state);
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drm_atomic_helper_cleanup_planes(drm, state);
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drm_atomic_state_free(state);
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}
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static void mtk_atomic_work(struct work_struct *work)
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{
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struct mtk_drm_private *private = container_of(work,
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struct mtk_drm_private, commit.work);
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mtk_atomic_complete(private, private->commit.state);
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}
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static int mtk_atomic_commit(struct drm_device *drm,
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struct drm_atomic_state *state,
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bool async)
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{
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struct mtk_drm_private *private = drm->dev_private;
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int ret;
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ret = drm_atomic_helper_prepare_planes(drm, state);
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if (ret)
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return ret;
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mutex_lock(&private->commit.lock);
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flush_work(&private->commit.work);
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drm_atomic_helper_swap_state(drm, state);
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if (async)
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mtk_atomic_schedule(private, state);
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else
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mtk_atomic_complete(private, state);
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mutex_unlock(&private->commit.lock);
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return 0;
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}
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static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
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.fb_create = mtk_drm_mode_fb_create,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = mtk_atomic_commit,
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};
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static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
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DDP_COMPONENT_OVL0,
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DDP_COMPONENT_COLOR0,
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DDP_COMPONENT_AAL,
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DDP_COMPONENT_OD,
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DDP_COMPONENT_RDMA0,
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DDP_COMPONENT_UFOE,
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DDP_COMPONENT_DSI0,
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DDP_COMPONENT_PWM0,
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};
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static const enum mtk_ddp_comp_id mtk_ddp_ext[] = {
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DDP_COMPONENT_OVL1,
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DDP_COMPONENT_COLOR1,
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DDP_COMPONENT_GAMMA,
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DDP_COMPONENT_RDMA1,
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DDP_COMPONENT_DPI0,
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};
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static int mtk_drm_kms_init(struct drm_device *drm)
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{
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struct mtk_drm_private *private = drm->dev_private;
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struct platform_device *pdev;
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struct device_node *np;
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int ret;
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if (!iommu_present(&platform_bus_type))
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return -EPROBE_DEFER;
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pdev = of_find_device_by_node(private->mutex_node);
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if (!pdev) {
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dev_err(drm->dev, "Waiting for disp-mutex device %s\n",
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private->mutex_node->full_name);
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of_node_put(private->mutex_node);
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return -EPROBE_DEFER;
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}
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private->mutex_dev = &pdev->dev;
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drm_mode_config_init(drm);
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drm->mode_config.min_width = 64;
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drm->mode_config.min_height = 64;
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/*
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* set max width and height as default value(4096x4096).
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* this value would be used to check framebuffer size limitation
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* at drm_mode_addfb().
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*/
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drm->mode_config.max_width = 4096;
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drm->mode_config.max_height = 4096;
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drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
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ret = component_bind_all(drm->dev, drm);
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if (ret)
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goto err_config_cleanup;
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/*
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* We currently support two fixed data streams, each optional,
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* and each statically assigned to a crtc:
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* OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
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*/
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ret = mtk_drm_crtc_create(drm, mtk_ddp_main, ARRAY_SIZE(mtk_ddp_main));
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if (ret < 0)
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goto err_component_unbind;
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/* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
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ret = mtk_drm_crtc_create(drm, mtk_ddp_ext, ARRAY_SIZE(mtk_ddp_ext));
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if (ret < 0)
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goto err_component_unbind;
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/* Use OVL device for all DMA memory allocations */
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np = private->comp_node[mtk_ddp_main[0]] ?:
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private->comp_node[mtk_ddp_ext[0]];
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pdev = of_find_device_by_node(np);
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if (!pdev) {
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ret = -ENODEV;
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dev_err(drm->dev, "Need at least one OVL device\n");
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goto err_component_unbind;
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}
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private->dma_dev = &pdev->dev;
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/*
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* We don't use the drm_irq_install() helpers provided by the DRM
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* core, so we need to set this manually in order to allow the
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* DRM_IOCTL_WAIT_VBLANK to operate correctly.
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*/
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drm->irq_enabled = true;
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ret = drm_vblank_init(drm, MAX_CRTC);
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if (ret < 0)
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goto err_component_unbind;
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drm_kms_helper_poll_init(drm);
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drm_mode_config_reset(drm);
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return 0;
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err_component_unbind:
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component_unbind_all(drm->dev, drm);
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err_config_cleanup:
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drm_mode_config_cleanup(drm);
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return ret;
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}
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static void mtk_drm_kms_deinit(struct drm_device *drm)
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{
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drm_kms_helper_poll_fini(drm);
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drm_vblank_cleanup(drm);
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component_unbind_all(drm->dev, drm);
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drm_mode_config_cleanup(drm);
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}
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static const struct file_operations mtk_drm_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.mmap = mtk_drm_gem_mmap,
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.poll = drm_poll,
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.read = drm_read,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = drm_compat_ioctl,
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#endif
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};
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static struct drm_driver mtk_drm_driver = {
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.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
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DRIVER_ATOMIC,
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.get_vblank_counter = drm_vblank_count,
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.enable_vblank = mtk_drm_crtc_enable_vblank,
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.disable_vblank = mtk_drm_crtc_disable_vblank,
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.gem_free_object = mtk_drm_gem_free_object,
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.gem_vm_ops = &drm_gem_cma_vm_ops,
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.dumb_create = mtk_drm_gem_dumb_create,
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.dumb_map_offset = mtk_drm_gem_dumb_map_offset,
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.dumb_destroy = drm_gem_dumb_destroy,
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_export = drm_gem_prime_export,
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.gem_prime_import = drm_gem_prime_import,
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.gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
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.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
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.gem_prime_mmap = mtk_drm_gem_mmap_buf,
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.fops = &mtk_drm_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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};
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static int compare_of(struct device *dev, void *data)
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{
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return dev->of_node == data;
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}
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static int mtk_drm_bind(struct device *dev)
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{
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struct mtk_drm_private *private = dev_get_drvdata(dev);
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struct drm_device *drm;
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int ret;
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drm = drm_dev_alloc(&mtk_drm_driver, dev);
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if (!drm)
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return -ENOMEM;
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drm_dev_set_unique(drm, dev_name(dev));
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drm->dev_private = private;
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private->drm = drm;
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ret = mtk_drm_kms_init(drm);
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if (ret < 0)
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goto err_free;
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ret = drm_dev_register(drm, 0);
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if (ret < 0)
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goto err_deinit;
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ret = drm_connector_register_all(drm);
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if (ret < 0)
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goto err_unregister;
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return 0;
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err_unregister:
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drm_dev_unregister(drm);
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err_deinit:
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mtk_drm_kms_deinit(drm);
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err_free:
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drm_dev_unref(drm);
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return ret;
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}
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static void mtk_drm_unbind(struct device *dev)
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{
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struct mtk_drm_private *private = dev_get_drvdata(dev);
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drm_put_dev(private->drm);
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private->drm = NULL;
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}
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static const struct component_master_ops mtk_drm_ops = {
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.bind = mtk_drm_bind,
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.unbind = mtk_drm_unbind,
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};
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static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
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{ .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL },
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{ .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA },
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{ .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA },
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{ .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
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{ .compatible = "mediatek,mt8173-disp-aal", .data = (void *)MTK_DISP_AAL},
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{ .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
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{ .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE },
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{ .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI },
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{ .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI },
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{ .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
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{ .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM },
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{ .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD },
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{ }
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};
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static int mtk_drm_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_drm_private *private;
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struct resource *mem;
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struct device_node *node;
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struct component_match *match = NULL;
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int ret;
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int i;
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private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
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if (!private)
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return -ENOMEM;
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mutex_init(&private->commit.lock);
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INIT_WORK(&private->commit.work, mtk_atomic_work);
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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private->config_regs = devm_ioremap_resource(dev, mem);
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if (IS_ERR(private->config_regs)) {
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ret = PTR_ERR(private->config_regs);
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dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
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ret);
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return ret;
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}
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|
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/* Iterate over sibling DISP function blocks */
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for_each_child_of_node(dev->of_node->parent, node) {
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const struct of_device_id *of_id;
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enum mtk_ddp_comp_type comp_type;
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int comp_id;
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of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
|
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if (!of_id)
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continue;
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|
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if (!of_device_is_available(node)) {
|
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dev_dbg(dev, "Skipping disabled component %s\n",
|
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node->full_name);
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continue;
|
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}
|
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comp_type = (enum mtk_ddp_comp_type)of_id->data;
|
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if (comp_type == MTK_DISP_MUTEX) {
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private->mutex_node = of_node_get(node);
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continue;
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}
|
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|
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comp_id = mtk_ddp_comp_get_id(node, comp_type);
|
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if (comp_id < 0) {
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dev_warn(dev, "Skipping unknown component %s\n",
|
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node->full_name);
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continue;
|
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}
|
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|
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private->comp_node[comp_id] = of_node_get(node);
|
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|
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/*
|
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* Currently only the OVL, RDMA, DSI, and DPI blocks have
|
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* separate component platform drivers and initialize their own
|
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* DDP component structure. The others are initialized here.
|
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*/
|
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if (comp_type == MTK_DISP_OVL ||
|
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comp_type == MTK_DISP_RDMA ||
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comp_type == MTK_DSI ||
|
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comp_type == MTK_DPI) {
|
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dev_info(dev, "Adding component match for %s\n",
|
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node->full_name);
|
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component_match_add(dev, &match, compare_of, node);
|
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} else {
|
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struct mtk_ddp_comp *comp;
|
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|
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comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
|
||||
if (!comp) {
|
||||
ret = -ENOMEM;
|
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goto err_node;
|
||||
}
|
||||
|
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ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
|
||||
if (ret)
|
||||
goto err_node;
|
||||
|
||||
private->ddp_comp[comp_id] = comp;
|
||||
}
|
||||
}
|
||||
|
||||
if (!private->mutex_node) {
|
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dev_err(dev, "Failed to find disp-mutex node\n");
|
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ret = -ENODEV;
|
||||
goto err_node;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
platform_set_drvdata(pdev, private);
|
||||
|
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ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
|
||||
if (ret)
|
||||
goto err_pm;
|
||||
|
||||
return 0;
|
||||
|
||||
err_pm:
|
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pm_runtime_disable(dev);
|
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err_node:
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of_node_put(private->mutex_node);
|
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for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
|
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of_node_put(private->comp_node[i]);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mtk_drm_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct mtk_drm_private *private = platform_get_drvdata(pdev);
|
||||
struct drm_device *drm = private->drm;
|
||||
int i;
|
||||
|
||||
drm_connector_unregister_all(drm);
|
||||
drm_dev_unregister(drm);
|
||||
mtk_drm_kms_deinit(drm);
|
||||
drm_dev_unref(drm);
|
||||
|
||||
component_master_del(&pdev->dev, &mtk_drm_ops);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
of_node_put(private->mutex_node);
|
||||
for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
|
||||
of_node_put(private->comp_node[i]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int mtk_drm_sys_suspend(struct device *dev)
|
||||
{
|
||||
struct mtk_drm_private *private = dev_get_drvdata(dev);
|
||||
struct drm_device *drm = private->drm;
|
||||
|
||||
drm_kms_helper_poll_disable(drm);
|
||||
|
||||
private->suspend_state = drm_atomic_helper_suspend(drm);
|
||||
if (IS_ERR(private->suspend_state)) {
|
||||
drm_kms_helper_poll_enable(drm);
|
||||
return PTR_ERR(private->suspend_state);
|
||||
}
|
||||
|
||||
DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mtk_drm_sys_resume(struct device *dev)
|
||||
{
|
||||
struct mtk_drm_private *private = dev_get_drvdata(dev);
|
||||
struct drm_device *drm = private->drm;
|
||||
|
||||
drm_atomic_helper_resume(drm, private->suspend_state);
|
||||
drm_kms_helper_poll_enable(drm);
|
||||
|
||||
DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
|
||||
mtk_drm_sys_resume);
|
||||
|
||||
static const struct of_device_id mtk_drm_of_ids[] = {
|
||||
{ .compatible = "mediatek,mt8173-mmsys", },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct platform_driver mtk_drm_platform_driver = {
|
||||
.probe = mtk_drm_probe,
|
||||
.remove = mtk_drm_remove,
|
||||
.driver = {
|
||||
.name = "mediatek-drm",
|
||||
.of_match_table = mtk_drm_of_ids,
|
||||
.pm = &mtk_drm_pm_ops,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_driver * const mtk_drm_drivers[] = {
|
||||
&mtk_ddp_driver,
|
||||
&mtk_disp_ovl_driver,
|
||||
&mtk_disp_rdma_driver,
|
||||
&mtk_drm_platform_driver,
|
||||
};
|
||||
|
||||
static int __init mtk_drm_init(void)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mtk_drm_drivers); i++) {
|
||||
ret = platform_driver_register(mtk_drm_drivers[i]);
|
||||
if (ret < 0) {
|
||||
pr_err("Failed to register %s driver: %d\n",
|
||||
mtk_drm_drivers[i]->driver.name, ret);
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
while (--i >= 0)
|
||||
platform_driver_unregister(mtk_drm_drivers[i]);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit mtk_drm_exit(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = ARRAY_SIZE(mtk_drm_drivers) - 1; i >= 0; i--)
|
||||
platform_driver_unregister(mtk_drm_drivers[i]);
|
||||
}
|
||||
|
||||
module_init(mtk_drm_init);
|
||||
module_exit(mtk_drm_exit);
|
||||
|
||||
MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
|
||||
MODULE_DESCRIPTION("Mediatek SoC DRM driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Reference in New Issue
Block a user