Commit Graph

9 Commits

Author SHA1 Message Date
Alexander Shishkin 18b39b61b2 intel_th: pci: Add Gemini Lake support
[ Upstream commit 340837f985c2cb87ca0868d4aa9ce42b0fab3a21 ]

This adds Intel(R) Trace Hub PCI ID for Gemini Lake SOC.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-12-20 10:07:22 +01:00
Alexander Shishkin d8b992d935 intel_th: pci: Add Cannon Lake PCH-LP support
commit efb3669e14fe17d0ec4ecf57d0365039fe726f59 upstream.

This adds Intel(R) Trace Hub PCI ID for Cannon Lake PCH-LP.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-09-09 17:39:39 +02:00
Alexander Shishkin a22d561178 intel_th: pci: Add Cannon Lake PCH-H support
commit 84331e1390b6378a5129a3678c87a42c6f697d29 upstream.

This adds Intel(R) Trace Hub PCI ID for Cannon Lake PCH-H.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-09-09 17:39:39 +02:00
Alexander Shishkin 7a1a47ce35 intel_th: pci: Add Kaby Lake PCH-H support
This adds Intel(R) Trace Hub PCI ID for Kaby Lake PCH-H.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: <stable@vger.kernel.org>
2016-07-14 13:16:56 +03:00
Alexander Shishkin aaa3ca8228 intel_th: pci: Add Broxton-M SOC support
This adds Intel(R) Trace Hub PCI ID for Broxton-M SOC.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
2016-04-19 22:54:05 +03:00
Alexander Shishkin d7b1787161 intel_th: Set root device's drvdata early
Already during the subdevice initialization time, devices will need
to reference Intel TH controller descriptor structure.

This patch moves setting the drvdata from the pci glue to intel_th
core, before subdevices are populated.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20 14:09:14 -08:00
Alexander Shishkin 3f040887a8 intel_th: pci: Add Broxton SOC support
This adds Intel(R) Trace Hub PCI ID for Broxton SOC.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-07 22:43:17 -08:00
Alexander Shishkin 6396b912f1 intel_th: pci: Add Apollo Lake SOC support
This adds Intel(R) Trace Hub PCI ID for Apollo Lake SOC.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-07 22:43:17 -08:00
Alexander Shishkin 2b0b16d329 intel_th: Add pci glue layer for Intel(R) Trace Hub
This patch adds basic support for PCI-based Intel TH devices. It requests
2 bars (configuration registers for the subdevices and STH channel MMIO
region) and calls into Intel TH core code to create the bus with subdevices
etc.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-04 20:28:58 +01:00