apply usb camera apps working for hikey970

Signed-off-by: qwx495460 <qwx495460@notesmail.huawei.com>

arch/arm64/boot/dts/hisilicon/kirin970-hikey970.dts

@@ -59,8 +59,13 @@
 		};
 
 		ramoops_ram:pstore-mem{
+			compatible = "ramoops";
 			reg = <0x0 0x20A00000 0x0 0x100000>;
-			no-map;
+			record-size	= <0x00020000>;
+			console-size	= <0x00020000>;
+			ftrace-size	= <0x0>;
+			dump-oops = <0x1>;
+			ecc-size = <0x0>;
 		};
 
 		uefi-reboot-mode {

arch/arm64/configs/hikey960_defconfig

@@ -549,3 +549,4 @@ CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
 CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
 CONFIG_CRYPTO_CRC32_ARM64=y
 CONFIG_CRC_T10DIF=y
+CONFIG_SDCARD_FS=y

arch/arm64/configs/hikey970_defconfig

@@ -729,3 +729,17 @@ CONFIG_HIKEY970_HIFI=y
 CONFIG_HISI_ASP_DMA=y
 CONFIG_SND_I2S_HISI_I2S=y
 CONFIG_HDMI_ADV7511_AUDIO=y
+CONFIG_SDCARD_FS=y
+
+CONFIG_FRAME_VECTOR=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_MEMOPS=y
+CONFIG_VIDEOBUF2_VMALLOC=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+
+
+
+
+

drivers/gpu/drm/hisilicon/kirin9xx/Makefile

@@ -1,6 +1,5 @@
 EXTRA_CFLAGS += \
 		-Iinclude/drm
-
 kirin-drm-y := kirin_fbdev.o \
 		kirin_fb.o \
 		kirin_drm_drv.o \

drivers/gpu/drm/hisilicon/kirin9xx/dw_drm_dsi.c

@@ -359,7 +359,10 @@ static void get_dsi_dphy_ctrl(struct dw_dsi *dsi,
 	if (bpp < 0)
 		return;
 
-	dsi->client[id].lanes = 4;
+	if (mode->clock > 80000)
+	    dsi->client[id].lanes = 4;
+	else
+	    dsi->client[id].lanes = 3;
 
 	if (dsi->client[id].phy_clock)
 		dphy_req_kHz = dsi->client[id].phy_clock;
@@ -935,8 +938,7 @@ static void mipi_config_dphy_spec1v2_parameter(struct dw_dsi *dsi, char __iomem
 	u32 lanes;
 
 	lanes =  dsi->client[dsi->cur_client].lanes - 1;
-
-	for (i = 0; i <= (lanes+1); i++) {
+	for (i = 0; i <= (lanes + 1); i++) {
 		//Lane Transmission Property
 		addr = MIPIDSI_PHY_TST_LANE_TRANSMISSION_PROPERTY + (i << 5);
 		dsi_phy_tst_set(mipi_dsi_base, addr, 0x43);
@@ -960,10 +962,12 @@ static void mipi_config_dphy_spec1v2_parameter(struct dw_dsi *dsi, char __iomem
 	//clock lane timing ctrl - t_hs_trial
 	dsi_phy_tst_set(mipi_dsi_base, MIPIDSI_PHY_TST_CLK_TRAIL, DSS_REDUCE(dsi->phy.clk_t_hs_trial));
 
-	for (i = 0; i <= (lanes + 1); i++) {
-		if (i == 2) {
+	for (i = 0; i <= 4; i++) {
+		if (lanes == 2 && i == 1) /*init mipi dsi 3 lanes shoud skip lane3*/
+			i++;
+
+		if (i == 2) /* skip clock lane*/
 			i++;  //addr: lane0:0x60; lane1:0x80; lane2:0xC0; lane3:0xE0
-		}
 
 		//data lane pre_delay
 		addr = MIPIDSI_PHY_TST_DATA_PRE_DELAY + (i << 5);
@@ -1019,6 +1023,9 @@ static void dsi_mipi_init(struct dw_dsi *dsi, char __iomem *mipi_dsi_base)
 	dss_rect_t rect;
 	u32 cmp_stopstate_val = 0;
 	u32 lanes;
+#if !defined (CONFIG_HISI_FB_970)
+	int i = 0;
+#endif
 
 	WARN_ON(!dsi);
 	WARN_ON(!mipi_dsi_base);
@@ -1132,7 +1139,7 @@ static void dsi_mipi_init(struct dw_dsi *dsi, char __iomem *mipi_dsi_base)
 	/* clock lane timing ctrl - t_hs_trial*/
 	dsi_phy_tst_set(mipi_dsi_base, 0x25, dsi->phy.clk_t_hs_trial);
 
-	for (int i = 0; i <= lanes; i++) {
+	for (i = 0; i <= lanes; i++) {
 		/* data lane pre_delay*/
 		tmp = 0x30 + (i << 4);
 		dsi_phy_tst_set(mipi_dsi_base, tmp, DSS_REDUCE(dsi->phy.data_pre_delay));
@@ -1361,10 +1368,9 @@ static int mipi_dsi_on_sub1(struct dw_dsi *dsi, char __iomem *mipi_dsi_base)
 
 static int mipi_dsi_on_sub2(struct dw_dsi *dsi, char __iomem *mipi_dsi_base)
 {
+	u64 pctrl_dphytx_stopcnt = 0;
 	WARN_ON(!mipi_dsi_base);
-	u64 pctrl_dphytx_stopcnt;
 
-	pctrl_dphytx_stopcnt = 0;
 	/* switch to video mode */
 	set_reg(mipi_dsi_base + MIPIDSI_MODE_CFG_OFFSET, 0x0, 1, 0);
 
@@ -2040,11 +2046,8 @@ static int dsi_suspend(struct platform_device *pdev, pm_message_t state)
 	struct dsi_data *ddata = dev_get_drvdata(dev);
 	struct dw_dsi *dsi = &ddata->dsi;
 
-	DRM_INFO("+. pdev->name is %s, pm_message is %d \n", pdev->name, state.event);
-
 	dsi_encoder_disable(&dsi->encoder);
-
-	DRM_INFO("-. \n");
+	drm_bridge_post_disable(dsi->encoder.bridge);
 
 	return 0;
 }
@@ -2055,12 +2058,9 @@ static int dsi_resume(struct platform_device *pdev)
 	struct dsi_data *ddata = dev_get_drvdata(dev);
 	struct dw_dsi *dsi = &ddata->dsi;
 
-	DRM_INFO("+. pdev->name is %s \n", pdev->name);
-
+	drm_bridge_pre_enable(dsi->encoder.bridge);
 	dsi_encoder_enable(&dsi->encoder);
 
-	DRM_INFO("-. \n");
-
 	return 0;
 }
 

drivers/gpu/drm/hisilicon/kirin9xx/hdmi/adv7535.c

@@ -28,7 +28,8 @@
 
 #include "adv7535.h"
 
-#define HPD_ENABLE	1
+//#define HPD_ENABLE	1
+#define HPD_ENABLE	0
 //#define TEST_COLORBAR_DISPLAY
 #ifdef CONFIG_HDMI_ADV7511_AUDIO
 extern int adv7511_audio_init(struct device *dev);
@@ -785,19 +786,25 @@ adv7511_detect(struct adv7511 *adv7511,
 {
 	enum drm_connector_status status;
 	unsigned int val;
+	unsigned int time = 0;
 #if HPD_ENABLE
 	bool hpd;
 #endif
 	int ret;
 
 	ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
-	if (ret < 0)
+	if (ret < 0) {
+		DRM_ERROR("regmap_read fail, ret = %d \n", ret);
 		return connector_status_disconnected;
+	}
 
-	if (val & ADV7511_STATUS_HPD)
+	if (val & ADV7511_STATUS_HPD) {
+		DRM_INFO("connected : regmap_read val = 0x%x \n", val);
 		status = connector_status_connected;
-	else
+	} else {
+		DRM_INFO("disconnected : regmap_read val = 0x%x \n", val);
 		status = connector_status_disconnected;
+	}
 
 #if HPD_ENABLE
 	hpd = adv7511_hpd(adv7511);
@@ -820,7 +827,32 @@ adv7511_detect(struct adv7511 *adv7511,
 	}
 #endif
 
+	if (status == connector_status_disconnected) {
+		do {
+			ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
+			if (ret < 0) {
+				DRM_ERROR("regmap_read fail, ret = %d \n", ret);
+				return connector_status_disconnected;
+			}
+
+			if (val & ADV7511_STATUS_HPD) {
+				DRM_INFO("connected : regmap_read val = 0x%x \n", val);
+				status = connector_status_connected;
+			} else {
+				DRM_INFO("disconnected : regmap_read val = 0x%x \n", val);
+				status = connector_status_disconnected;
+			}
+			time ++;
+			mdelay(20);
+		} while (status == connector_status_disconnected && time < 10);
+	}
+
+	if (time >= 10)
+		DRM_ERROR("Read connector status timout, time = %d \n", time);
+
 	adv7511->status = status;
+
+	DRM_INFO("hdmi connector status = %d \n", status);
 	return status;
 }
 
@@ -939,14 +971,10 @@ static void adv7511_mode_set(struct adv7511 *adv7511,
 		struct mipi_dsi_device *dsi = adv7511->dsi;
 		int lanes, ret;
 
-#if defined(CONFIG_HISI_FB_970)
-		lanes = 4;
-#else
 		if (adj_mode->clock > 80000)
 			lanes = 4;
 		else
 			lanes = 3;
-#endif
 
 		if (lanes != dsi->lanes) {
 			mipi_dsi_detach(dsi);

drivers/gpu/drm/hisilicon/kirin9xx/kirin970_dpe_reg.h

@@ -43,6 +43,7 @@
 /* vcc name */
 #define REGULATOR_PDP_NAME	"regulator_dsssubsys"
 #define REGULATOR_MMBUF	"regulator_mmbuf"
+#define REGULATOR_MEDIA_NAME  "regulator_media_subsys"
 
 /*******************************************************************************
 **
@@ -220,8 +221,8 @@ typedef struct drm_dss_layer {
 
 /*dss clk power off */
 #define DEFAULT_DSS_CORE_CLK_RATE_POWER_OFF   	(277000000UL)
-#define DEFAULT_DSS_PXL0_CLK_RATE_POWER_OFF    	(277000000UL)
-#define DEFAULT_DSS_MMBUF_CLK_RATE_POWER_OFF 	(238000000UL)
+#define DEFAULT_DSS_PXL0_CLK_RATE_POWER_OFF    	(238000000UL)
+#define DEFAULT_DSS_MMBUF_CLK_RATE_POWER_OFF 	(208000000UL)
 #define DEFAULT_DSS_PXL1_CLK_RATE_POWER_OFF 	(238000000UL)
 
 #define DEFAULT_PCLK_DSS_RATE	(114000000UL)
@@ -449,6 +450,7 @@ enum dss_chn_module {
 	MODULE_SCL_LUT,
 	MODULE_ARSR2P,
 	MODULE_ARSR2P_LUT,
+	MODULE_POST_CLIP_ES,
 	MODULE_POST_CLIP,
 	MODULE_PCSC,
 	MODULE_CSC,
@@ -4084,8 +4086,8 @@ struct dss_hw_ctx {
 	struct dss_clk_rate *dss_clk;
 
 	struct regulator *dpe_regulator;
-	struct regulator_bulk_data *mmbuf_regulator;
-	struct regulator_bulk_data *media_subsys_regulator;
+	struct regulator *mmbuf_regulator;
+	struct regulator *mediacrg_regulator;
 
 	bool power_on;
 	int irq;

drivers/gpu/drm/hisilicon/kirin9xx/kirin_dpe_reg.h

@@ -3073,8 +3073,8 @@ struct dss_hw_ctx {
 	struct dss_clk_rate *dss_clk;
 
 	struct regulator *dpe_regulator;
-	struct regulator_bulk_data *mmbuf_regulator;
-	struct regulator_bulk_data *media_subsys_regulator;
+	struct regulator *mmbuf_regulator;
+	struct regulator *mediacrg_regulator;
 
 	bool power_on;
 	int irq;

drivers/gpu/drm/hisilicon/kirin9xx/kirin_drm_dpe_utils.c

@@ -1009,7 +1009,7 @@ int dpe_regulator_enable(struct dss_hw_ctx *ctx)
 		return -EINVAL;
 	}
 
-	ret = regulator_enable(ctx->dpe_regulator);
+	//ret = regulator_enable(ctx->dpe_regulator);
 	if (ret) {
 		DRM_ERROR(" dpe regulator_enable failed, error=%d!\n", ret);
 		return -EINVAL;
@@ -1024,31 +1024,57 @@ int dpe_regulator_disable(struct dss_hw_ctx *ctx)
 {
 	int ret = 0;
 
-	DRM_INFO("+. \n");
 	if (NULL == ctx) {
 		DRM_ERROR("NULL ptr.\n");
 		return -EINVAL;
 	}
 
 	#if defined (CONFIG_HISI_FB_970)
-		dpe_set_clk_rate_on_pll0(ctx);
+		dpe_set_pixel_clk_rate_on_pll0(ctx);
+		dpe_set_common_clk_rate_on_pll0(ctx);
 	#endif
 
-	ret = regulator_disable(ctx->dpe_regulator);
+	//ret = regulator_disable(ctx->dpe_regulator);
 	if (ret != 0) {
 		DRM_ERROR("dpe regulator_disable failed, error=%d!\n", ret);
 		return -EINVAL;
 	}
 
-	if (ctx->g_dss_version_tag != FB_ACCEL_KIRIN970) {
-		ret = regulator_bulk_disable(1, ctx->mmbuf_regulator);
-		if (ret != 0) {
-			DRM_ERROR("mmbuf regulator_disable failed, error=%d!\n", ret);
-			return -EINVAL;
-		}
+	return ret;
+}
+
+int mediacrg_regulator_enable(struct dss_hw_ctx *ctx)
+{
+	int ret = 0;
+
+	if (NULL == ctx) {
+		DRM_ERROR("NULL ptr.\n");
+		return -EINVAL;
+	}
+
+	//ret = regulator_enable(ctx->mediacrg_regulator);
+	if (ret) {
+		DRM_ERROR("mediacrg regulator_enable failed, error=%d!\n", ret);
+	}
+
+	return ret;
+}
+
+int mediacrg_regulator_disable(struct dss_hw_ctx *ctx)
+{
+	int ret = 0;
+
+	if (NULL == ctx) {
+		DRM_ERROR("NULL ptr.\n");
+		return -EINVAL;
+	}
+
+	//ret = regulator_disable(ctx->mediacrg_regulator);
+	if (ret != 0) {
+		DRM_ERROR("mediacrg regulator_disable failed, error=%d!\n", ret);
+		return -EINVAL;
 	}
 
-	DRM_INFO("-. \n");
 	return ret;
 }
 
@@ -1098,7 +1124,29 @@ int dpe_set_clk_rate(struct dss_hw_ctx *ctx)
 	return ret;
 }
 
-int dpe_set_clk_rate_on_pll0(struct dss_hw_ctx *ctx)
+int dpe_set_pixel_clk_rate_on_pll0(struct dss_hw_ctx *ctx)
+{
+	int ret;
+	uint64_t clk_rate;
+
+	DRM_INFO("+. \n");
+	if (NULL == ctx) {
+		DRM_ERROR("NULL Pointer!\n");
+		return -EINVAL;
+	}
+
+	clk_rate = DEFAULT_DSS_PXL0_CLK_RATE_POWER_OFF;
+	ret = clk_set_rate(ctx->dss_pxl0_clk, clk_rate);
+	if (ret < 0) {
+		DRM_ERROR("dss_pxl0_clk clk_set_rate(%llu) failed, error=%d!\n", clk_rate, ret);
+		return -EINVAL;
+	}
+	DRM_INFO("dss_pxl0_clk:[%llu]->[%llu].\n", clk_rate, (uint64_t)clk_get_rate(ctx->dss_pxl0_clk));
+
+	return ret;
+}
+
+int dpe_set_common_clk_rate_on_pll0(struct dss_hw_ctx *ctx)
 {
 	int ret;
 	uint64_t clk_rate;
@@ -1125,13 +1173,5 @@ int dpe_set_clk_rate_on_pll0(struct dss_hw_ctx *ctx)
 	}
 	DRM_INFO("dss_pri_clk:[%llu]->[%llu].\n", clk_rate, (uint64_t)clk_get_rate(ctx->dss_pri_clk));
 
-	clk_rate = DEFAULT_DSS_PXL0_CLK_RATE_POWER_OFF;
-	ret = clk_set_rate(ctx->dss_pxl0_clk, clk_rate);
-	if (ret < 0) {
-		DRM_ERROR("dss_pxl0_clk clk_set_rate(%llu) failed, error=%d!\n", clk_rate, ret);
-		return -EINVAL;
-	}
-	DRM_INFO("dss_pxl0_clk:[%llu]->[%llu].\n", clk_rate, (uint64_t)clk_get_rate(ctx->dss_pxl0_clk));
-
 	return ret;
 }

drivers/gpu/drm/hisilicon/kirin9xx/kirin_drm_dpe_utils.h

@@ -50,6 +50,8 @@ int dpe_inner_clk_enable(struct dss_hw_ctx *ctx);
 int dpe_inner_clk_disable(struct dss_hw_ctx *ctx);
 int dpe_regulator_enable(struct dss_hw_ctx *ctx);
 int dpe_regulator_disable(struct dss_hw_ctx *ctx);
+int mediacrg_regulator_enable(struct dss_hw_ctx *ctx);
+int mediacrg_regulator_disable(struct dss_hw_ctx *ctx);
 int dpe_set_clk_rate(struct dss_hw_ctx *ctx);
 
 int dpe_irq_enable(struct dss_crtc *acrtc);
@@ -59,6 +61,8 @@ int dpe_init(struct dss_crtc *acrtc);
 int dpe_deinit(struct dss_crtc *acrtc);
 void dpe_check_itf_status(struct dss_crtc *acrtc);
 int dpe_set_clk_rate_on_pll0(struct dss_hw_ctx *ctx);
+int dpe_set_common_clk_rate_on_pll0(struct dss_hw_ctx *ctx);
+int dpe_set_pixel_clk_rate_on_pll0(struct dss_hw_ctx *ctx);
 
 void hisifb_dss_on(struct dss_hw_ctx *ctx);
 void hisi_dss_mctl_on(struct dss_hw_ctx *ctx);

drivers/gpu/drm/hisilicon/kirin9xx/kirin_drm_drv.c

@@ -144,7 +144,7 @@ static int kirin_drm_kms_init(struct drm_device *dev)
 	/* init kms poll for handling hpd */
 	drm_kms_helper_poll_init(dev);
 
-#if 0
+#if 1
 	/* force detection after connectors init */
 	(void)drm_helper_hpd_irq_event(dev);
 #endif

drivers/gpu/drm/hisilicon/kirin9xx/kirin_drm_dss.c

@@ -52,7 +52,6 @@
 #define DTS_COMP_DSS_NAME "hisilicon,hi3660-dpe"
 #endif
 
-#define PPLL7_USED_IN_DRV
 #define DSS_DEBUG	0
 
 static const struct dss_format dss_formats[] = {
@@ -102,7 +101,6 @@ u32 dss_get_format(u32 pixel_format)
 	return HISI_FB_PIXEL_FORMAT_UNSUPPORT;
 }
 
-#ifdef PPLL7_USED_IN_DRV
 /*******************************************************************************
 **
 */
@@ -248,7 +246,6 @@ int hdmi_pxl_ppll7_init(struct dss_hw_ctx *ctx, uint64_t pixel_clock)
 	}
 	return ret;
 }
-#endif
 
 /*******************************************************************************
  **
@@ -274,18 +271,12 @@ static void dss_ldi_set_mode(struct dss_crtc *acrtc)
 		else
 			clk_Hz = mode->clock * 1000UL;
 
-#ifdef PPLL7_USED_IN_DRV
+		/* Adjust pixel clock for compatibility with 10.1 inch special displays. */
+		if (mode->clock == 148500 && mode->width_mm == 532 && mode->height_mm == 299)
+			clk_Hz = 152000 * 1000UL;
+
+		DRM_INFO("HDMI real need clock = %llu \n", clk_Hz);
 		hdmi_pxl_ppll7_init(ctx, clk_Hz);
-#else
-		/*
-		 * Success should be guaranteed in mode_valid call back,
-		 * so failure shouldn't happen here
-		 */
-		ret = clk_set_rate(ctx->dss_pxl0_clk, clk_Hz);
-		if (ret) {
-			DRM_ERROR("failed to set pixel clk %llu Hz (%d)\n", clk_Hz, ret);
-		}
-#endif
 		adj_mode->clock = clk_Hz / 1000;
 	} else {
 		if (mode->clock == 148500)
@@ -321,6 +312,7 @@ static int dss_power_up(struct dss_crtc *acrtc)
 	int ret = 0;
 
 #if defined (CONFIG_HISI_FB_970)
+	mediacrg_regulator_enable(ctx);
 	dpe_common_clk_enable(ctx);
 	dpe_inner_clk_enable(ctx);
 	#ifndef DSS_POWER_UP_ON_UEFI
@@ -385,14 +377,16 @@ static void dss_power_down(struct dss_crtc *acrtc)
 	dss_inner_clk_pdp_disable(ctx);
 
 	if (ctx->g_dss_version_tag & FB_ACCEL_KIRIN970 ) {
+		dpe_regulator_disable(ctx);
 		dpe_inner_clk_disable(ctx);
 		dpe_common_clk_disable(ctx);
-		dpe_regulator_disable(ctx);
+		mediacrg_regulator_disable(ctx);
 	} else {
 		dpe_regulator_disable(ctx);
 		dpe_inner_clk_disable(ctx);
 		dpe_common_clk_disable(ctx);
 	}
+
 	ctx->power_on = false;
 }
 
@@ -788,7 +782,13 @@ static int dss_dts_parse(struct platform_device *pdev, struct dss_hw_ctx *ctx)
 #if defined (CONFIG_HISI_FB_970)
 	ctx->dpe_regulator = devm_regulator_get(dev, REGULATOR_PDP_NAME);
 	if (!ctx->dpe_regulator) {
-		DRM_ERROR("failed to get regulator resource! ret=%d.\n", ret);
+		DRM_ERROR("failed to get dpe_regulator resource! ret=%d.\n", ret);
+		return -ENXIO;
+	}
+
+	ctx->mediacrg_regulator = devm_regulator_get(dev, REGULATOR_MEDIA_NAME);
+	if (!ctx->mediacrg_regulator) {
+		DRM_ERROR("failed to get mediacrg_regulator resource! ret=%d.\n", ret);
 		return -ENXIO;
 	}
 #endif
@@ -945,11 +945,8 @@ static int  dss_drm_suspend(struct platform_device *pdev, pm_message_t state)
 	struct dss_data *dss = platform_get_drvdata(pdev);
 	struct drm_crtc *crtc = &dss->acrtc.base;
 
-	DRM_INFO("+. platform_device name is %s \n", pdev->name);
 	dss_crtc_disable(crtc);
 
-	DRM_INFO("-. \n");
-
 	return 0;
 }
 
@@ -958,12 +955,9 @@ static int  dss_drm_resume(struct platform_device *pdev)
 	struct dss_data *dss = platform_get_drvdata(pdev);
 	struct drm_crtc *crtc = &dss->acrtc.base;
 
-	DRM_INFO("+. platform_device name is %s \n", pdev->name);
-
 	dss_crtc_mode_set_nofb(crtc);
 	dss_crtc_enable(crtc);
 
-	DRM_INFO("-. \n");
 	return 0;
 }
 

drivers/gpu/drm/hisilicon/kirin9xx/kirin_drm_overlay_utils.c

@@ -28,9 +28,6 @@
 #include "kirin_drm_dpe_utils.h"
 #include "kirin_drm_drv.h"
 
-
-#define DSS_CHN_MAX_DEFINE (DSS_COPYBIT_MAX)
-
 static int mid_array[DSS_CHN_MAX_DEFINE] = {0xb, 0xa, 0x9, 0x8, 0x7, 0x6, 0x5, 0x4, 0x2, 0x1, 0x3, 0x0};
 
 #if defined (CONFIG_HISI_FB_970)

drivers/hisi/ics/cambricon_ipu.c

@@ -2519,7 +2519,7 @@ static int cambricon_ipu_probe(struct platform_device *pdev)
 		err = -ENXIO;
 		goto release_res_cfg;
 	}
-	IOREAD_RANGE(adapter->config_reg_virt_addr, 0xff);
+	// IOREAD_RANGE(adapter->config_reg_virt_addr, 0xff);
 
 	if (!ipu_get_feature_tree(&pdev->dev)) {
 		printk(KERN_ERR"[%s]: fatal err, unknown feature tree\n", __func__);
@@ -2574,7 +2574,7 @@ static int cambricon_ipu_probe(struct platform_device *pdev)
 		printk(KERN_ERR"[%s]IPU_ERROR:ics_irq_io_addr ioremap fail\n", __func__);
 		goto destroy_device;
 	}
-	IOREAD_RANGE(adapter->ics_irq_io_addr, 0xff);
+	// IOREAD_RANGE(adapter->ics_irq_io_addr, 0xff);
 #endif
 
 	if (!ipu_smmu_master_get_offset(&pdev->dev)) {

drivers/hisi/ics/ipu_clock.c

@@ -75,7 +75,6 @@ int ipu_clock_init(struct device *dev, struct ics_clock *clk, bool lpm3_set_vcod
 
 static int ipu_clock_set(struct ics_clock *clk, unsigned int new_rate)
 {
-	int ret;
 	unsigned int target_rate = new_rate;
 
 	if (new_rate == clk->curr_rate) {

drivers/hisi/ics/ipu_smmu_drv.c

@@ -587,10 +587,6 @@ long ipu_smmu_map(struct map_data *map)
 	iova_size = phys_len;
 	iova_start = ipu_alloc_iova(ipu_iova_pool, iova_size);
 
-	unsigned long smmu_scr_addr = (unsigned long)smmu_manager.common_io_addr + smmu_common_reg_offset.smmu_scr;
-
-	unsigned long smmu_mint_addr = (unsigned long)smmu_manager.master_io_addr + smmu_master_reg_offset.smmu_mstr_intmask;
-
 	sg_size = iommu_map_sg(ipu_smmu_domain, iova_start, sgl,
 			(unsigned int)sg_nents(sgl), format->prot);
 

drivers/misc/ti-st/st_core.c

@@ -124,7 +124,7 @@ static void st_send_frame(unsigned char chnl_id, struct st_data_s *st_gdata)
 			(st_gdata->list[chnl_id]->priv_data, st_gdata->rx_skb)
 			     != 0)) {
 			pr_err(" proto stack %d's ->recv failed", chnl_id);
-			kfree_skb(st_gdata->rx_skb);
+			//kfree_skb(st_gdata->rx_skb);  //fix bug for BT open/close test
 			return;
 		}
 	} else {

drivers/net/ethernet/realtek/r8168_n.c

@@ -86,6 +86,7 @@
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
 #endif
+#include <linux/workqueue.h>
 
 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
@@ -443,6 +444,18 @@ static void rtl8168_phy_power_up(struct net_device *dev);
 static void rtl8168_phy_power_down(struct net_device *dev);
 static int rtl8168_set_speed(struct net_device *dev, u8 autoneg,  u32 speed, u8 duplex);
 
+#ifdef CONFIG_PCIE_KIRIN
+extern int kirin_pcie_pm_control(int power_ops);
+#endif
+
+static unsigned int remove_work_count = 1;
+static struct work_struct remove_work;
+static void
+rtl8168_remove_work(struct work_struct *work)
+{
+	kirin_pcie_pm_control(0);
+}
+
 #ifdef CONFIG_R8168_NAPI
 static int rtl8168_poll(napi_ptr napi, napi_budget budget);
 #endif
@@ -3543,7 +3556,16 @@ rtl8168_check_link_status(struct net_device *dev)
                         }
                         break;
                 }
-        }
+#ifdef CONFIG_PCIE_KIRIN
+			remove_work_count++;
+			if (remove_work_count > 6) {
+				INIT_WORK(&remove_work, rtl8168_remove_work);
+				schedule_work(&remove_work);
+			}
+		} else {
+			remove_work_count = 0;
+#endif
+	}
 }
 
 static void

drivers/pci/host/pcie-kirin.c

@@ -105,13 +105,14 @@ static int kirin_pcie_link_up(struct pcie_port *pp)
 	struct kirin_pcie *pcie = to_kirin_pcie(pp);
 	u32 val = kirin_elb_readl(pcie, SOC_PCIECTRL_STATE0_ADDR);
 
+
 	if ((val & PCIE_LINKUP_ENABLE) == PCIE_LINKUP_ENABLE)
 		return 1;
 
 	return 0;
 }
 
-static int kirin_pcie_establish_link(struct pcie_port *pp)
+int kirin_pcie_establish_link(struct pcie_port *pp)
 {
 	int count = 0;
 
@@ -270,6 +271,21 @@ int kirin_pcie_restore_rc_cfg(struct kirin_pcie *pcie)
 	return 0;
 }
 
+int kirin_pcie_pm_control(int power_ops)
+{
+	struct kirin_pcie *pcie;
+	int (*pm_control)(int);
+
+	pcie = g_kirin_pcie;
+	pm_control = pcie->pcie_ops->pcie_pm_control;
+	if (!pm_control)
+		return -1;
+
+	return pm_control(power_ops);
+}
+EXPORT_SYMBOL_GPL(kirin_pcie_pm_control);
+
+
 static int kirin_pcie_probe(struct platform_device *pdev)
 {
 	struct kirin_pcie *pcie;
@@ -326,6 +342,7 @@ static int kirin_pcie_probe(struct platform_device *pdev)
 	}
 
 	ret = kirin_pcie_save_rc_cfg(pcie);
+	atomic_set(&(pcie->usr_suspend), 0);
 
 	return 0;
 }
@@ -353,10 +370,11 @@ static int kirin_pcie_resume_noirq(struct device *dev)
 	if (ret)
 		return ret;
 
-	ret = kirin_pcie_establish_link(&(pcie->pp));
-	if (ret)
-		return ret;
-
+	if (!atomic_read(&(pcie->usr_suspend))) {
+		ret = kirin_pcie_establish_link(&(pcie->pp));
+		if (ret)
+			return ret;
+	}
 	return 0;
 }
 
@@ -393,6 +411,19 @@ static int kirin_pcie_suspend_noirq(struct device *dev)
 
 #endif
 
+static void kirin_pcie_shutdown(struct platform_device *pdev)
+{
+	struct kirin_pcie *pcie;
+
+	pcie = dev_get_drvdata(&(pdev->dev));
+	if (pcie == NULL) {
+		dev_err(&pdev->dev, "Failed to get drvdata\n");
+		return;
+	}
+
+	pcie->pcie_ops->pcie_shutdown(pcie);
+}
+
 static const struct dev_pm_ops kirin_pcie_dev_pm_ops = {
 	.suspend_noirq	= kirin_pcie_suspend_noirq,
 	.resume_noirq		= kirin_pcie_resume_noirq,
@@ -414,6 +445,7 @@ MODULE_DEVICE_TABLE(of, kirin_pcie_match);
 
 struct platform_driver kirin_pcie_driver = {
 	.probe			= kirin_pcie_probe,
+	.shutdown		= kirin_pcie_shutdown,
 	.driver			= {
 		.name			= "Kirin-pcie",
 		.owner			= THIS_MODULE,

drivers/pci/host/pcie-kirin.h

@@ -91,6 +91,9 @@ struct kirin_pcie {
 	struct pci_saved_state      *rc_saved_state;
 	const struct kirin_pcie_ops *pcie_ops;
 	struct regulator            *ldo33;
+	atomic_t		is_power_on;
+	atomic_t		usr_suspend;
+	struct mutex		power_lock;
 };
 
 struct kirin_pcie_ops {
@@ -99,6 +102,8 @@ struct kirin_pcie_ops {
 	int (*pcie_resume_noirq)(struct device *dev);
 	void (*kirin_phy_writel)(struct kirin_pcie *pcie, u32 val, u32 reg);
 	u32 (*kirin_phy_readl)(struct kirin_pcie *pcie, u32 reg);
+	int (*pcie_pm_control)(int power_ops);
+	void (*pcie_shutdown)(struct kirin_pcie *pcie);
 };
 
 static inline void kirin_elb_writel(struct kirin_pcie *pcie, u32 val, u32 reg)
@@ -133,7 +138,9 @@ static inline u32 kirin_natural_phy_readl(struct kirin_pcie *pcie, u32 reg)
 
 int kirin_pcie_save_rc_cfg(struct kirin_pcie *pcie);
 int kirin_pcie_restore_rc_cfg(struct kirin_pcie *pcie);
+int kirin_pcie_establish_link(struct pcie_port *pp);
 
+extern struct kirin_pcie *g_kirin_pcie;
 extern const struct kirin_pcie_ops kirin960_pcie_ops;
 extern const struct kirin_pcie_ops kirin970_pcie_ops;
 #endif

drivers/pci/host/pcie-kirin970.c

@@ -593,12 +593,23 @@ static int kirin970_pcie_clkreq_cfg(struct kirin_pcie *pcie, int pull_up)
 
 int kirin970_pcie_turn_on(struct kirin_pcie *pcie)
 {
-	int ret;
+	int ret = 0;
 	u32 val;
 
+	mutex_lock(&pcie->power_lock);
+
+	if (atomic_read(&(pcie->is_power_on)))
+		goto MUTEX_UNLOCK;
+
+	ret = regulator_enable(pcie->ldo33);
+	if (ret) {
+		dev_err(pcie->pp.dev, "Failed to enable ldo33\n");
+		goto MUTEX_UNLOCK;
+	}
+
 	ret = kirin970_pcie_clkreq_cfg(pcie, false);
 	if (ret)
-		return ret;
+		goto DISABLE_LDO;
 
 	/* pull downphy ISO */
 	regmap_write(pcie->sysctrl, 0x44, 0x20);
@@ -606,7 +617,7 @@ int kirin970_pcie_turn_on(struct kirin_pcie *pcie)
 	/* enable PCIe sys&phy pclk */
 	ret = kirin970_pcie_pclk_ctrl(pcie, true);
 	if (ret)
-		return ret;
+		goto DISABLE_LDO;
 
 	/* deasset PCIeCtrl&PCIePHY */
 	regmap_write(pcie->crgctrl, 0x88, 0x8c000000);
@@ -637,23 +648,35 @@ int kirin970_pcie_turn_on(struct kirin_pcie *pcie)
 	if (kirin970_pcie_noc_power(pcie, false))
 		goto ALLCLK_CLOSE;
 
-	return 0;
+	atomic_set(&(pcie->is_power_on), 1);
+	ret = 0;
+	goto MUTEX_UNLOCK;
 
 ALLCLK_CLOSE:
 	kirin970_pcie_allclk_ctrl(pcie, false);
 PCLK_CLOSE:
 	kirin970_pcie_pclk_ctrl(pcie, false);
-	return -1;
+DISABLE_LDO:
+	regulator_disable(pcie->ldo33);
+	ret = -1;
+MUTEX_UNLOCK:
+	mutex_unlock(&pcie->power_lock);
+	return ret;
 }
 
 int kirin970_pcie_turn_off(struct kirin_pcie *pcie)
 {
 	u32 val;
-	int ret;
+	int ret = 0;
+
+	mutex_lock(&pcie->power_lock);
+
+	if (!atomic_read(&(pcie->is_power_on)))
+		goto MUTEX_UNLOCK;
 
 	ret = kirin970_pcie_noc_power(pcie, true);
 	if (ret)
-		return ret;
+		goto MUTEX_UNLOCK;
 
 	kirin970_pcie_perst_cfg(pcie, false);
 
@@ -671,9 +694,19 @@ int kirin970_pcie_turn_off(struct kirin_pcie *pcie)
 
 	ret = kirin970_pcie_clkreq_cfg(pcie, true);
 	if (ret)
-		return ret;
+		goto MUTEX_UNLOCK;
 
-	return 0;
+	atomic_set(&(pcie->is_power_on), 0);
+
+	ret = regulator_disable(pcie->ldo33);
+	if (ret) {
+		dev_err(pcie->pp.dev, "Failed to disable ldo33\n");
+		goto MUTEX_UNLOCK;
+	}
+
+MUTEX_UNLOCK:
+	mutex_unlock(&pcie->power_lock);
+	return ret;
 }
 
 int kirin970_pcie_power_on(struct kirin_pcie *pcie, bool on)
@@ -692,17 +725,17 @@ static int kirin970_pcie_probe(struct kirin_pcie *pcie)
 
 	pp = &pcie->pp;
 	pdev = to_platform_device(pp->dev);
-	
+
 	ret = kirin970_pcie_get_clk(pcie, pdev);
 	if (ret != 0)
-		return -ENODEV;	
+		return -ENODEV;
 
 	ret = kirin970_pcie_get_resource(pp, pdev);
 	if (ret != 0)
 		return -ENODEV;
-	
+
 	kirin_pcie_get_eyeparam(pcie, pdev);
-	
+
 	pcie->gpio_id_reset[0] = of_get_named_gpio(pdev->dev.of_node,
 			"switch,reset-gpios", 0);
 	pcie->gpio_id_reset[1] = of_get_named_gpio(pdev->dev.of_node,
@@ -711,7 +744,7 @@ static int kirin970_pcie_probe(struct kirin_pcie *pcie)
 			"m_2,reset-gpios", 0);
 	pcie->gpio_id_reset[3] = of_get_named_gpio(pdev->dev.of_node,
 			"mini1,reset-gpios", 0);
-	
+
 	if (pcie->gpio_id_reset[0] < 0)
 		return -ENODEV;
 	if (pcie->gpio_id_reset[1] < 0)
@@ -720,7 +753,7 @@ static int kirin970_pcie_probe(struct kirin_pcie *pcie)
 		return -ENODEV;
 	if (pcie->gpio_id_reset[3] < 0)
 		return -ENODEV;
-	
+
 	if (gpio_request((unsigned int)pcie->gpio_id_reset[0], "pcie_switch_reset"))
 		return -EINVAL;
 	if (gpio_request((unsigned int)pcie->gpio_id_reset[1], "pcie_eth_reset"))
@@ -729,16 +762,11 @@ static int kirin970_pcie_probe(struct kirin_pcie *pcie)
 		return -EINVAL;
 	if (gpio_request((unsigned int)pcie->gpio_id_reset[3], "pcie_mini1_reset"))
 		return -EINVAL;
-	
+
 	pcie->ldo33 = devm_regulator_get(pp->dev, "ldo33");
 	if(IS_ERR_OR_NULL(pcie->ldo33))
 		return PTR_ERR(pcie->ldo33);
 
-	ret = regulator_enable(pcie->ldo33);
-	if (ret) {
-		dev_err(pp->dev, "Failed to enable ldo33\n");
-		return ret;
-	}
 
 	ret = kirin970_pcie_pinctrl_init(pcie, pdev);
 	if (ret != 0)
@@ -762,6 +790,8 @@ static int kirin970_pcie_probe(struct kirin_pcie *pcie)
 	if (gpio_request((unsigned int)pcie->gpio_id_clkreq[2], "pcie_mini1_clkreq"))
 		return -EINVAL;
 
+	mutex_init(&pcie->power_lock);
+
 	ret = kirin970_pcie_power_on(pcie, true);
 	if (ret)
 		return ret;
@@ -769,6 +799,99 @@ static int kirin970_pcie_probe(struct kirin_pcie *pcie)
 	return 0;
 }
 
+#define ETH_DEVICE 0x8168
+#define ETH_VENDOR 0x10ec
+
+static bool pcie_can_sleep(struct kirin_pcie *pcie)
+{
+	struct pci_dev *dev = NULL;
+	int type;
+
+	for_each_pci_dev(dev) {
+		if (dev) {
+			type = pci_pcie_type(dev);
+			if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END)) {
+				if ((dev->device != ETH_DEVICE) || (dev->vendor != ETH_VENDOR))
+					return false;
+			}
+		}
+	}
+
+	return true;
+}
+
+static int kirin970_pcie_usr_suspend(struct kirin_pcie *pcie)
+{
+	int ret;
+	struct pcie_port *pp;
+
+	pp = &pcie->pp;
+
+	if (atomic_read(&(pcie->usr_suspend)) || !atomic_read(&(pcie->is_power_on))) {
+		dev_err(pp->dev, "Already suspend by EP\n");
+		return -EINVAL;
+	}
+
+	ret = kirin970_pcie_power_on(pcie, false);
+	if (ret) {
+		dev_err(pp->dev, "Failed to power off\n");
+		return ret;
+	}
+
+	atomic_set(&(pcie->usr_suspend), 1);
+	return 0;
+}
+
+static int kirin970_pcie_usr_resume(struct kirin_pcie *pcie)
+{
+	int ret;
+	struct pcie_port *pp;
+	struct pci_dev *rc_dev;
+
+	pp = &pcie->pp;
+	rc_dev = pcie->rc_dev;
+
+	atomic_set(&(pcie->usr_suspend), 0);
+
+	if (kirin970_pcie_power_on(pcie, true)) {
+		dev_err(pp->dev, "Failed to power on\n");
+		atomic_set(&(pcie->usr_suspend), 1);
+		return -EINVAL;
+	}
+
+	ret = kirin_pcie_establish_link(&pcie->pp);
+	if (ret) {
+		if (kirin970_pcie_power_on(pcie, false))
+			dev_err(pp->dev, "Failed to power off\n");
+		atomic_set(&(pcie->usr_suspend), 1);
+		return -EINVAL;
+	}
+
+	if (rc_dev)
+		kirin_pcie_restore_rc_cfg(pcie);
+
+	return 0;
+}
+
+
+
+int kirin970_pcie_pm_control(int power_ops)
+{
+	struct kirin_pcie *pcie = g_kirin_pcie;
+
+	if (power_ops) {
+		return kirin970_pcie_usr_resume(pcie);
+	} else {
+		if (!pcie_can_sleep(pcie))
+			return -1;
+
+		pci_remove_root_bus(pcie->rc_dev->bus);
+
+		return kirin970_pcie_usr_suspend(pcie);
+	}
+}
+EXPORT_SYMBOL_GPL(kirin970_pcie_pm_control);
+
 static int kirin970_pcie_resume_noirq(struct device *dev)
 {
 	struct pci_dev *rc_dev;
@@ -783,13 +906,15 @@ static int kirin970_pcie_resume_noirq(struct device *dev)
 	pp = &pcie->pp;
 	rc_dev = pcie->rc_dev;
 
-	if (kirin970_pcie_power_on(pcie, true)) {
-		dev_err(dev, "Failed to power on\n");
-		return -EINVAL;
-	}
+	if (!atomic_read(&(pcie->usr_suspend))) {
+		if (kirin970_pcie_power_on(pcie, true)) {
+			dev_err(dev, "Failed to power on\n");
+			return -EINVAL;
+		}
 
-	if (rc_dev)
-		kirin_pcie_restore_rc_cfg(pcie);
+		if (rc_dev)
+			kirin_pcie_restore_rc_cfg(pcie);
+	}
 
 	return 0;
 }
@@ -809,20 +934,36 @@ static int kirin970_pcie_suspend_noirq(struct device *dev)
 	rc_dev = pcie->rc_dev;
 	pp = &pcie->pp;
 
-	if (kirin970_pcie_power_on(pcie, false)) {
-		dev_err(dev, "Failed to power off\n");
-		return -EINVAL;
+	if (atomic_read(&(pcie->is_power_on))) {
+		if (!atomic_read(&(pcie->usr_suspend))) {
+			if (kirin970_pcie_power_on(pcie, false)) {
+				dev_err(dev, "Failed to power off\n");
+				return -EINVAL;
+			}
+		}
 	}
 
 	return 0;
 }
 
+static void kirin970_pcie_shutdown(struct kirin_pcie *pcie)
+{
+	if (atomic_read(&(pcie->is_power_on))) {
+		if (kirin970_pcie_power_on(pcie, false)) {
+			dev_err(pcie->pp.dev, "Failed to power off\n");
+			return;
+		}
+	}
+}
+
 const struct kirin_pcie_ops kirin970_pcie_ops = {
 	.pcie_probe = kirin970_pcie_probe,
 	.kirin_phy_writel = kirin970_phy_writel,
 	.kirin_phy_readl = kirin970_phy_readl,
 	.pcie_suspend_noirq = kirin970_pcie_suspend_noirq,
 	.pcie_resume_noirq = kirin970_pcie_resume_noirq,
+	.pcie_pm_control = kirin970_pcie_pm_control,
+	.pcie_shutdown = kirin970_pcie_shutdown,
 };
 
  EXPORT_SYMBOL_GPL(kirin970_pcie_ops);