qwx495460
159 lines
6.2 KiB
Devicetree
159 lines
6.2 KiB
Devicetree
/*
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* Copyright (C) 2012-2013 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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/{
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regulators_ip: regulator_ip@0xFFF35000 {
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compatible = "hisilicon,hisi_regulator_ip_atf_core";
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reg = <0x00 0xE87FF000 0x00 0x1000>;
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media1_subsys: ip@0 {
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compatible = "ip-regulator-atf";
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regulator-name = "media1_subsys";
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hisilicon,hisi-regulator-id = <0>;
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hisilicon,hisi-regulator-type = <1>;/*0:pmu;1:ip;2:scharger*/
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;/*0:not check clock state;1:check clock state*/
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hisilicon,hisi-need-to-enable-clock = <0>;/*0:donot enable clock;1:enable clock*/
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hisilicon,hisi-clock-rate-set-flag = <0>;/*low frequency clock set flag:0:donot set clock rate;1:set clock rate*/
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hisilicon,hisi-clock-rate-set = <0>;/*frequency:0:not set frequency;*/
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;/*switch to ppll0 flag:0:donot set clock rate;1:set clock rate*/
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hisilicon,hisi-ppll0-clock-rate-set = <0>;/*ppll0 frequency:0:not set frequency;*/
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hisilicon,hisi-regulator-is-fake = <0>;/*0:this ip is effective;1:this ip is ineffective*/
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};
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vivobus: ip@1 {
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compatible = "ip-regulator-atf";
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regulator-name = "vivobus";
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hisilicon,hisi-regulator-id = <1>;
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hisilicon,hisi-regulator-type = <1>;/*0:pmu;1:ip;2:scharger*/
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vivobus-supply = <&media1_subsys>;
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hisilicon,supply_name = "vivobus";
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;/*0:not check clock state;1:check clock state*/
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hisilicon,hisi-need-to-enable-clock = <0>;/*0:donot enable clock;1:enable clock*/
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hisilicon,hisi-clock-rate-set-flag = <0>;/*low frequency clock set flag:0:donot set clock rate;1:set clock rate*/
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;/*0:this ip is effective;1:this ip is ineffective*/
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};
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media2_subsys: ip@8 {
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compatible = "ip-regulator-atf";
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regulator-name = "media2_subsys";
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hisilicon,hisi-regulator-id = <8>;
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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};
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vcodecsubsys: ip@2 {
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compatible = "ip-regulator-atf";
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regulator-name = "vcodecsubsys";
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hisi,noc-node-name = "peri_vcodec_bus";
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hisilicon,hisi-regulator-id = <2>;
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vcodecsubsys-supply = <&media2_subsys>;
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hisilicon,supply_name = "vcodecsubsys";
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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};
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dsssubsys: ip@3 {
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compatible = "ip-regulator-atf";
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regulator-name = "dsssubsys";
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hisilicon,hisi-regulator-id = <3>;
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dsssubsys-supply = <&vivobus>;
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hisilicon,supply_name = "dsssubsys";
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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hisilicon,hisi-regulator-dss-boot-check = <0x38 0xC0>;
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};
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ispsubsys: ip@4 {
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compatible = "ip-regulator-atf";
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regulator-name = "ispsubsys";
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hisilicon,hisi-regulator-id = <4>;
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ispsubsys-supply = <&vivobus>;
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hisilicon,supply_name = "ispsubsys";
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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};
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vdec: ip@5 {
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compatible = "ip-regulator-atf";
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regulator-name = "vdec";
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hisilicon,hisi-regulator-id = <5>;
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vdec-supply = <&vcodecsubsys>;
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hisilicon,supply_name = "vdec";
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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};
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venc: ip@6 {
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compatible = "ip-regulator-atf";
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regulator-name = "venc";
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hisilicon,hisi-regulator-id = <6>;
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venc-supply = <&vcodecsubsys>;
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hisilicon,supply_name = "venc";
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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};
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isp_srt: ip@7 {
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compatible = "ip-regulator-atf";
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regulator-name = "isp_srt";
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hisilicon,hisi-regulator-id = <7>;
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isp_srt-supply = <&ispsubsys>;
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hisilicon,supply_name = "isp_srt";
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hisilicon,hisi-regulator-type = <1>;
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hisilicon,hisi-regulator-clk-num = <0>;
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hisilicon,hisi-regulator-clk-check-flag = <0>;
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hisilicon,hisi-need-to-enable-clock = <0>;
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hisilicon,hisi-clock-rate-set-flag = <0>;
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hisilicon,hisi-clock-rate-set = <0>;
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hisilicon,hisi-ppll0-clock-rate-set-flag = <0>;
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hisilicon,hisi-ppll0-clock-rate-set = <0>;
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hisilicon,hisi-regulator-is-fake = <0>;
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};
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};
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};
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