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@@ -121,26 +121,6 @@ static void mdp5_kms_destroy(struct msm_kms *kms)
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mmu->funcs->detach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports));
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mmu->funcs->destroy(mmu);
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}
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if (mdp5_kms->ctlm)
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mdp5_ctlm_destroy(mdp5_kms->ctlm);
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if (mdp5_kms->smp)
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mdp5_smp_destroy(mdp5_kms->smp);
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if (mdp5_kms->cfg)
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mdp5_cfg_destroy(mdp5_kms->cfg);
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kfree(mdp5_kms);
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}
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static void mdp5_kms_destroy2(struct msm_kms *kms)
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{
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struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
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struct msm_mmu *mmu = mdp5_kms->mmu;
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if (mmu) {
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mmu->funcs->detach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports));
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mmu->funcs->destroy(mmu);
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}
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}
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static const struct mdp_kms_funcs kms_funcs = {
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@@ -158,7 +138,7 @@ static const struct mdp_kms_funcs kms_funcs = {
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.get_format = mdp_get_format,
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.round_pixclk = mdp5_round_pixclk,
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.set_split_display = mdp5_set_split_display,
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.destroy = mdp5_kms_destroy2,
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.destroy = mdp5_kms_destroy,
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},
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.set_irqmask = mdp5_set_irqmask,
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};
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@@ -422,21 +402,6 @@ fail:
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return ret;
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}
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static void read_hw_revision(struct mdp5_kms *mdp5_kms,
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uint32_t *major, uint32_t *minor)
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{
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uint32_t version;
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mdp5_enable(mdp5_kms);
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version = mdp5_read(mdp5_kms, REG_MDSS_HW_VERSION);
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mdp5_disable(mdp5_kms);
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*major = FIELD(version, MDSS_HW_VERSION_MAJOR);
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*minor = FIELD(version, MDSS_HW_VERSION_MINOR);
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DBG("MDP5 version v%d.%d", *major, *minor);
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}
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static void read_mdp_hw_revision(struct mdp5_kms *mdp5_kms,
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u32 *major, u32 *minor)
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{
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@@ -591,195 +556,6 @@ static u32 mdp5_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
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}
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struct msm_kms *mdp5_kms_init(struct drm_device *dev)
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{
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struct platform_device *pdev = dev->platformdev;
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struct mdp5_cfg *config;
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struct mdp5_kms *mdp5_kms;
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struct msm_kms *kms = NULL;
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struct msm_mmu *mmu;
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uint32_t major, minor;
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int irq, i, ret;
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mdp5_kms = kzalloc(sizeof(*mdp5_kms), GFP_KERNEL);
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if (!mdp5_kms) {
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dev_err(dev->dev, "failed to allocate kms\n");
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ret = -ENOMEM;
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goto fail;
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}
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spin_lock_init(&mdp5_kms->resource_lock);
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mdp_kms_init(&mdp5_kms->base, &kms_funcs);
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kms = &mdp5_kms->base.base;
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mdp5_kms->dev = dev;
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/* mdp5_kms->mmio actually represents the MDSS base address */
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mdp5_kms->mmio = msm_ioremap(pdev, "mdp_phys", "MDP5");
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if (IS_ERR(mdp5_kms->mmio)) {
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ret = PTR_ERR(mdp5_kms->mmio);
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goto fail;
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}
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mdp5_kms->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF");
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if (IS_ERR(mdp5_kms->vbif)) {
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ret = PTR_ERR(mdp5_kms->vbif);
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goto fail;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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ret = irq;
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dev_err(dev->dev, "failed to get irq: %d\n", ret);
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goto fail;
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}
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kms->irq = irq;
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mdp5_kms->vdd = devm_regulator_get(&pdev->dev, "vdd");
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if (IS_ERR(mdp5_kms->vdd)) {
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ret = PTR_ERR(mdp5_kms->vdd);
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goto fail;
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}
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ret = regulator_enable(mdp5_kms->vdd);
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if (ret) {
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dev_err(dev->dev, "failed to enable regulator vdd: %d\n", ret);
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goto fail;
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}
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/* mandatory clocks: */
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ret = get_clk(pdev, &mdp5_kms->axi_clk, "bus_clk", true);
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if (ret)
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goto fail;
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ret = get_clk(pdev, &mdp5_kms->ahb_clk, "iface_clk", true);
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if (ret)
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goto fail;
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ret = get_clk(pdev, &mdp5_kms->core_clk, "core_clk", true);
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if (ret)
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goto fail;
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ret = get_clk(pdev, &mdp5_kms->vsync_clk, "vsync_clk", true);
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if (ret)
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goto fail;
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/* optional clocks: */
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get_clk(pdev, &mdp5_kms->lut_clk, "lut_clk", false);
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/* we need to set a default rate before enabling. Set a safe
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* rate first, then figure out hw revision, and then set a
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* more optimal rate:
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*/
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clk_set_rate(mdp5_kms->core_clk, 200000000);
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read_hw_revision(mdp5_kms, &major, &minor);
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mdp5_kms->cfg = mdp5_cfg_init(mdp5_kms, major, minor);
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if (IS_ERR(mdp5_kms->cfg)) {
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ret = PTR_ERR(mdp5_kms->cfg);
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mdp5_kms->cfg = NULL;
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goto fail;
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}
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config = mdp5_cfg_get_config(mdp5_kms->cfg);
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mdp5_kms->caps = config->hw->mdp.caps;
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/* TODO: compute core clock rate at runtime */
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clk_set_rate(mdp5_kms->core_clk, config->hw->max_clk);
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/*
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* Some chipsets have a Shared Memory Pool (SMP), while others
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* have dedicated latency buffering per source pipe instead;
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* this section initializes the SMP:
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*/
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if (mdp5_kms->caps & MDP_CAP_SMP) {
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mdp5_kms->smp = mdp5_smp_init(mdp5_kms->dev, &config->hw->smp);
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if (IS_ERR(mdp5_kms->smp)) {
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ret = PTR_ERR(mdp5_kms->smp);
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mdp5_kms->smp = NULL;
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goto fail;
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}
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}
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mdp5_kms->ctlm = mdp5_ctlm_init(dev, mdp5_kms->mmio, mdp5_kms->cfg);
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if (IS_ERR(mdp5_kms->ctlm)) {
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ret = PTR_ERR(mdp5_kms->ctlm);
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mdp5_kms->ctlm = NULL;
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goto fail;
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}
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/* make sure things are off before attaching iommu (bootloader could
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* have left things on, in which case we'll start getting faults if
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* we don't disable):
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*/
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mdp5_enable(mdp5_kms);
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for (i = 0; i < MDP5_INTF_NUM_MAX; i++) {
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if (mdp5_cfg_intf_is_virtual(config->hw->intf.connect[i]) ||
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!config->hw->intf.base[i])
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continue;
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mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(i), 0);
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mdp5_write(mdp5_kms, REG_MDP5_INTF_FRAME_LINE_COUNT_EN(i), 0x3);
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}
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mdp5_disable(mdp5_kms);
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mdelay(16);
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if (config->platform.iommu) {
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mmu = msm_iommu_new(&pdev->dev, config->platform.iommu);
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if (IS_ERR(mmu)) {
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ret = PTR_ERR(mmu);
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dev_err(dev->dev, "failed to init iommu: %d\n", ret);
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iommu_domain_free(config->platform.iommu);
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goto fail;
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}
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ret = mmu->funcs->attach(mmu, iommu_ports,
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ARRAY_SIZE(iommu_ports));
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if (ret) {
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dev_err(dev->dev, "failed to attach iommu: %d\n", ret);
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mmu->funcs->destroy(mmu);
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goto fail;
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}
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} else {
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dev_info(dev->dev, "no iommu, fallback to phys "
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"contig buffers for scanout\n");
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mmu = NULL;
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}
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mdp5_kms->mmu = mmu;
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mdp5_kms->id = msm_register_mmu(dev, mmu);
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if (mdp5_kms->id < 0) {
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ret = mdp5_kms->id;
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dev_err(dev->dev, "failed to register mdp5 iommu: %d\n", ret);
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goto fail;
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}
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ret = modeset_init(mdp5_kms);
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if (ret) {
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dev_err(dev->dev, "modeset_init failed: %d\n", ret);
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goto fail;
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}
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dev->mode_config.min_width = 0;
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dev->mode_config.min_height = 0;
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dev->mode_config.max_width = config->hw->lm.max_width;
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dev->mode_config.max_height = config->hw->lm.max_height;
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dev->driver->get_vblank_timestamp = mdp5_get_vblank_timestamp;
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dev->driver->get_scanout_position = mdp5_get_scanoutpos;
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dev->driver->get_vblank_counter = mdp5_get_vblank_counter;
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dev->max_vblank_count = 0xffffffff;
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dev->vblank_disable_immediate = true;
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return kms;
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fail:
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if (kms)
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mdp5_kms_destroy(kms);
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return ERR_PTR(ret);
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}
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struct msm_kms *mdp5_kms_init2(struct drm_device *dev)
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{
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struct msm_drm_private *priv = dev->dev_private;
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struct platform_device *pdev;
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@@ -878,7 +654,7 @@ struct msm_kms *mdp5_kms_init2(struct drm_device *dev)
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return kms;
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fail:
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if (kms)
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mdp5_kms_destroy2(kms);
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mdp5_kms_destroy(kms);
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return ERR_PTR(ret);
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}
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